2006 IEEJ International Analog VLSI Workshop Home Page

This International Analog VLSI Workshop is sponsored by the Research Committee on Electronic Circuits of the IEEJ (The Institute of Electrical Engineers of Japan).

The purpose of the workshop is the exchange of information, ideas and recent research results on analog VLSI circuits and their applications. The main objective is to provide an informal setting for a group of analog VLSI specialists from both industry and academia worldwide, to meet and brainstorm.

Analog VLSI Workshop will be held at Hyatt Regency Hangzhou, Hangzhou, China, on 16th-18th November. The dates and locations are indicated below.

LINKS

AWARDS

• 2006 IEEJ International Analog VLSI Workshop Best Paper Award

  Recipients

  Ippei Akita, Kazuyuki Wada, and Yoshiaki Tadokoro (Toyohashi University of Technology)

  Title

  0.8-V CMOS Current Peak Detector and Its Application

  

REGISTRATION

Information page and on-line registration system is here.

HOTEL ACCOMMODATION

Hyatt Regency Hangzhou is the venue of this Workshop.

Here is the HOTEL RESERVATION form. Please send this form to the hotel after filling it out.

• All rooms are quoted per room per night and subject to 15% service charge and tax.
• All the above rates are valid for single or double occupancy and including one or two breakfast buffet at Cafe.

EXCURSION

Schedule is here.
Detailed information will be sent to participants who have registered through e-mail by our travel agent JTB.

TECHNICAL PROGRAM

The Research Committee on Electronic Circuits of the Institute of Electrical Engineers of Japan (IEEJ) is sponsoring 2006 International Analog VLSI Workshop to be held in Hangzhou, on November 16-18, 2006. The purpose of the Workshop is to exchange information, ideas and recent research results on analog VLSI circuits and their applications. This Workshop provides an informal setting for a group of analog VLSI specialists from both industry and academia worldwide, to meet and brainstorm. The work does not have to be complete, e.g. results from a test chip are not mandatory.

The topics for the Workshop include but are not limited to:

Amplifiers, Filters, Comparators, Multipliers, Voltage References, Sample-And-Hold Circuits, A/D and D/A Converters, Consumer Electronics, Mixed Analog and Digital Circuits, Analog Circuit Simulators, Analog Signal and Information Processing Applications (Telecommunication, Multimedia, Consumer, Medical, Automotive, Space, Military, etc.)

Authors are requested to submit their manuscripts via this page by August 4, 2006. Only PDF format, 4 to 6 pages manuscripts are acceptable. Further authors' information will be announced on the web site. Notifications of acceptance will be sent by E-Mail by September 25, 2006. The official language is English only. The deadline for camera-ready manuscript is October 10, 2006. It is mandatory that the accepted paper should be presented at the Workshop.

Author's Schedule:

Deadline for Submission of Manuscript	August 4, 2006
	August 31, 2006 Extended!!
Notification of Acceptance	September 25, 2006
Deadline for Submission of Camera Ready Paper	October 10, 2006

Organization:

General Chair		Hannu Tenhunen (Royal Institute of Technology)
Technical Program Committee	Chair	Akira Hyogo (Tokyo University of Science)
	Co-Chair	Mohammed Ismail (The Ohio State University)
	Secretary	Hiroki Sato (Tokyo University of Science)
		(Email: hrs at vlsi dot ee dot noda dot tus dot ac dot jp)
Local Arrangement Committee	Chair	Nick Tan (Zhejiang University)
Finance Committee	Chair	Nobukazu Takai (Gunma University)
	Secretary	Nicodimus Redian Agun (Tokyo Institute of Technology)
Publication Committee	Chair	Kazuyuki Wada (Toyohashi University of Technology)
		(Email: wada at ics dot tut dot ac dot jp)
	Secretary	Takahide Sato (Tokyo Institute of Technology)

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